The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Random access memory (RAM) is a form of computer data storage in which data stored in a random access device can be accessed directly in any random order. There are various types of RAM including resistive random access memory (RRAM). FIGS. 1-2 show a resistive random access memory (RRAM) 10 that includes an array 12 of memory cells provided by resistive elements 14. The resistive elements 14 may be accessed by access devices 16. The access devices 16 may include, for example, complementary metal-oxide-semiconductor (CMOS) transistors, bipolar junction transistors (BJTs), diodes, etc. Each of the resistive elements 14 has a corresponding conductive element 18 (e.g., a via or a contact). Each resistive element 14 may be referred to as a stack and include a first (or bottom) electrode 20, a variable resistive layer 22, a gettering layer 24, and a second (or top) electrode 26. The variable resistive layers 22 may include, for example, a transitional metal oxide. The gettering layers 24 may include, for example, a reactive metal. The conductive elements 18 are implemented as conductive layers on the stacks 14. The conductive elements 18 may be disposed between (i) the access devices 16 and (ii) the stacks 14. Alternatively, the conductive elements 18 may be disposed on an opposite side of the stacks 14 as the access devices 16. Two or more of the conductive elements 18 may be connected to each other by upper level interconnections (a single interconnection 30 is shown).
Traditionally, the resistive elements 14 and the conductive elements 18 are patterned using miniaturization methods, such as electron-beam lithography or extreme ultraviolet (EUV) lithography, which include the use of a photoresist. These methods employ low-throughput techniques, which include separately patterning the resistive elements 14 and conductive elements 18 using respective masks and etching processes. The methods result in element misalignment and element mismatching between the resistive elements 14 and the conductive elements 18.
Element misalignment refers to lateral misalignment between a conductive element and a resistive element, as shown by misalignment difference X in FIG. 1. Element mismatching refers to differences in shapes and edges of a conductive element and a corresponding resistive element. Due to the lithography techniques used, the resistive elements 14 and the conductive elements 18 have (i) rough and/or jagged edges, and (ii) contact surfaces with different shapes. For example, first contact surfaces 32 of the resistive elements 14 have a different shape than second contact surfaces 34 of the conductive elements 18. Thus, the first contact surfaces 32 do not match the second contact surfaces 34. The different shapes of the resistive elements 14 and the conductive elements 18 are represented in FIG. 1 by squares for the resistive elements 14 and by circles for the conductive elements 18. The actual shapes of the resistive elements 14 and the conductive elements 18 may be different and are typically irregular. The element misalignment and element mismatching increases resistances associated with the resistive elements 14 and the conductive elements 18 and can negatively affect performance of the RRAM 10.